Full Length Research Paper
J. S. Parab*, R. S. Gad and G. M. Naik
Electronics Section, Department of Physics, Goa University, Goa, India.
Field programmable PLD’s are becoming a standard in hardware technologies, as application demands have out placed the conventional processor's ability to deliver. The right combination of price, performance, ease-of use, along with significant power savings, can be achieved by using a Field Programmable Gate Array (FPGA). The versatility of these devices with the EDA tools such as Quartus, ISE, and Mentor Graphics integrated with MATLAB-Simulink gives upper hand for designer in any complex Digital signal processing (DSP) designs. Altera and Xilinx has DSP generator and System generator as target specific tools which support various IP cores libraries for such designs. We have designed an embedded system with Xilinx Spartan III based FPGA for real time audio processing. Various audio effects such as Echo, Reverberation, Fading, Flanging etc. can be demonstrated for real time performance. The designed system has 12-bit ADC tuned for the base-band signal unto 500 KHz. Also, the system can be configured as a DSP processor with IP cores like FFT, convolution etc. The reconstruction of analog signal is achieved with the help of 12-bit DAC converter module. Designed board has many applications in the field of biomedical, consumer, industrial and military. The same audio effects were tested on Altera CYCLONE II based DSP development kit.
Key words: DSP, ASP, ECHO, embedded system, Spartan -III, FPGA, altera.
|APA||(2009). Implementation of DSP algorithms on reconfigurable embedded platform. Journal of Electrical and Electronics Engineering Research, 1(1), 023-029.|
|Chicago||J. S. Parab, R. S. Gad and G. M. Naik. "Implementation of DSP algorithms on reconfigurable embedded platform." Journal of Electrical and Electronics Engineering Research 1, no. 1 (2009): 023-029.|
|MLA||J. S. Parab, R. S. Gad and G. M. Naik. "Implementation of DSP algorithms on reconfigurable embedded platform." Journal of Electrical and Electronics Engineering Research 1.1 (2009): 023-029.|