Mohammed Fadle Abdulla
Faculty of Engineering, University of Aden, Yemen
One of the main issues in designing a good course management system for distance learning is the turnaround time, such as the time consumed in the correction process of the assignments to a course been assigned with relatively large number of students. Here, the checking and correction of the homework submitted by the students often takes a lot of time and effort. This is especially true for digital logic design exercises, where a variety of functionally equivalent designs is possible. In this paper we present our vision to solve this problem for the Distance learning system. We show how to apply a novel signature analysis techniques known as concurrent intermediate checking register CIC to check the circuits designed by the students, at predefined time instants called check points, which have the property in which the original signature becomes equal to a function of the circuit responses. As the self test is run on the students’ own workstation, the system provides immediate feedback about whether a circuit is working, and it allows the reduction of the number of falsesolutions submitted by the students. We have verified the desired properties using selected high-level synthesis benchmarks.
Key words: Distance learning, self test, BIST, verilog simulator, moodle.
|APA||(2011). A new assignment checking technique to enhance the distance learning systems. Journal of Internet and Information Systems, 2(1), 1 - 10.|
|Chicago||Mohammed Fadle Abdulla. "A new assignment checking technique to enhance the distance learning systems." Journal of Internet and Information Systems 2, no. 1 (2011): 1 - 10.|
|MLA||Mohammed Fadle Abdulla. "A new assignment checking technique to enhance the distance learning systems." Journal of Internet and Information Systems 2.1 (2011): 1 - 10.|