Journal of
Engineering and Technology Research

  • Abbreviation: J. Eng. Technol. Res.
  • Language: English
  • ISSN: 2006-9790
  • DOI: 10.5897/JETR
  • Start Year: 2009
  • Published Articles: 198

Full Length Research Paper

Design of minimum error digital down-converter (DDC) for GSM mask requirements

Majid Salal Naghmash and Mohd Fadzil Ain
School of Electrical and Electronic Eng., University Sains Malaysia, Eng. Campus, 14300 Nibong Tebal, Penang, Malaysia.
Email: [email protected]

  •  Accepted: 06 July 2009
  •  Published: 31 August 2009



In this paper we present a new design of 2 FIR filters for use on a digital down-converter (DDC) to be used to downconvert a GSM signal. The hardware to work with is a Graychip 4016 multi-standard quad DDC chip (Graychip, Inc2001). The design of FIR filters using windows methods leads to good performance filters, however, sometimes there is a need to design a FIR filter that does not only perform well but is optimal. Optimization is the ability to specify a maximum error on each band of interest. This error is expressed as the absolute difference between the ideal or desired frequency response and the actual or resulting frequency response. One of the techniques to design optimal FIR filters is to minimize a Chebyshev error criterion. The resulting filters are known as Equiripple FIR filters. In our design by this method, we get the maximum error in passband ripple of about (- 0.013dB) and compensate the adjacent band rejection and blocker requirements. Therefore we make the development on 3G base station more economical and effective.


Key words: Wireless communications, FIR filter, digital down-converter.