In this work, three different types of Silicon (porous, nano and bulk) anode-based coin cells are manufactured and lithiation-delithiation battery cycling tests are conducted. During the experiment, a capacity difference is witnessed at the beginning and the end point of the battery cycling loop. This capacity difference during battery cycling is reduced by implementing side-reaction correction technique on the exchange current density using Tafel kinetics formula. A huge voltage gap known as voltage hysteresis is generated during the battery cycling experiment of all three type cells. Here, a physics based mathematical model is developed to identify the main reason behind this voltage hysteresis generation. The impact of hydrostatic stress is checked on this generated voltage hysteresis. The stress induced voltage values are found significantly low to have impact on voltage hysteresis. Next, key parameters are identified which can control this stress. Then, new sets of exchange current density equation (average, linear and logarithmic) as a function of State of Charge (SOC) are developed. It is observed that, with the application of logarithmic SOC dependent exchange current density equation, voltage curve is fitted the best with the experimental result and the generated hysteresis can be minimized by controlling this SOC based exchange current density equation. Details of this study will provide more explanation.
Key words: Hysteresis, state of charge, Tafel, model, battery, parameters
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