International Journal of
Physical Sciences

  • Abbreviation: Int. J. Phys. Sci.
  • Language: English
  • ISSN: 1992-1950
  • DOI: 10.5897/IJPS
  • Start Year: 2006
  • Published Articles: 2572

Full Length Research Paper

Novel nanometric reversible saturating adder

Majid Haghparast1* and Ali Patiar2
1Department of Computer Engineering, Shahre-Rey Branch, Islamic Azad University, Tehran, Iran. 2Department of Computer Engineering, Tabriz Branch, Islamic Azad University, Tabriz, Iran.
Email: [email protected]

  •  Accepted: 11 April 2011
  •  Published: 04 May 2011

Abstract

Reversible logic has found emerging attentions in nanotechnology, optical computing, quantum computing and low power CMOS design. In this paper a reversible saturating adder is presented for the first time. Some of digital signal processing (DSP) applications such as digital filters require that the result of arithmetic operations to be saturated. Saturation will happen when we have addition on two numbers with same signs. We have proposed a reversible 4-bit saturating adder for the first time with its essential units such as “overflow detection logic” and “saturation value generator” in the reversible fashion. All the important parameters in the design of reversible circuits like quantum cost, number of constant inputs and number of garbage outputs are reported. All the designs are in the nanometric scales.

 

Key words: Quantum computing, Reversible logic, saturation arithmetic.