A high voltage buried step-doping p+layer (BSP+L) lateral double diffused mosfet (LDMOS) on silicon-on-insulator (SOI) with a back-gate is proposed. The new structure is characterized by a BSP+L on the buried oxide under the source. When a high positive bias is applied to the back-gate in the off-state, the depleted BSP+L greatly enhances the electric field in the buried oxide layer under the source. Compared with conventional SOI LDMOS, much higher vertical breakdown voltage is sustained by the buried oxide layer under the source. Moreover, the reduced surface electric field (RESURF) effect is enhanced by the BSP+L, resulting in improvement of lateral breakdown voltage. Simulation results show that breakdown voltage of the new structure is improved greatly while on-resistance is relatively low.
Key words: Silicon-on-insulator, breakdown voltage, back-gate, buried step-doping p+ layer.
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