Scientific Research and Essays

  • Abbreviation: Sci. Res. Essays
  • Language: English
  • ISSN: 1992-2248
  • DOI: 10.5897/SRE
  • Start Year: 2006
  • Published Articles: 2768

Full Length Research Paper

A 32-bit floating-point module design for 3D graphic transformations

Ibrahim Sahin
Department of Electronics and Computer Education, Faculty of Technical Education, Duzce University 81620, Duzce, Turkey.
Email: [email protected]

  •  Accepted: 02 September 2010
  •  Published: 18 October 2010

Abstract

 

Nowadays, in computer animations, tens of, even hundreds of animation objects are placed in a scene to form a typical animation scene and thousands of vertices are used to mathematically define each object in the scene. Applying three dimensional (3D) transformations to such scenes requires huge amount of CPU time. As a result, calculation of an animation scene could take a long time. Moreover, in the case of real time animations, it becomes almost impossible to calculate transformations on time. In this presented work, a 32-bit floating-point based hardware module was designed to speed-up 3D graphic transformations using field programmable gate array (FPGA) chips. The module was tested and functional verification of the module was done by comparing the results produced by the module to the results generated by general purpose computers (PCs) for the same set of input data. Module’s data processing speed was compared to various PCs. The results showed that, 3D graphic transformations can be speeded-up by a factor (up to 11.47) employing the designed module.

 

Key words: Field programmable gate array, computer graphics, three dimensional transformation, hardware module.